<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/xe/xe_wa_oob.rules, branch master</title>
<subtitle>Linux kernel source tree.</subtitle>
<id>https://git.ilvokhin.com/linux.git/atom/drivers/gpu/drm/xe/xe_wa_oob.rules?h=master</id>
<link rel='self' href='https://git.ilvokhin.com/linux.git/atom/drivers/gpu/drm/xe/xe_wa_oob.rules?h=master'/>
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<updated>2026-04-03T19:56:18Z</updated>
<entry>
<title>drm/xe: Enable Wa_14025515070</title>
<updated>2026-04-03T19:56:18Z</updated>
<author>
<name>Julia Filipchuk</name>
<email>julia.filipchuk@intel.com</email>
</author>
<published>2026-03-04T00:34:24Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=f9a21696e37b069c96b81fa0ad8392b7b6d4a47e'/>
<id>urn:sha1:f9a21696e37b069c96b81fa0ad8392b7b6d4a47e</id>
<content type='text'>
Corrects a failure on context switch. On registration of context with
indirect ring state will correct state of targeted and idle command
streamers.

This Wa requires GuC 70.53+ (uapi 1.26+).  If indirect_ring_state is
enabled and Wa is unavailable, notify and disable indirect_ring_state.

Added additional XE_RTP_PASTE macros for expansion of longer rules.

Reviewed-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Signed-off-by: Julia Filipchuk &lt;julia.filipchuk@intel.com&gt;
Signed-off-by: Vinay Belgaumkar &lt;vinay.belgaumkar@intel.com&gt;
Link: https://patch.msgid.link/20260304003431.758201-4-julia.filipchuk@intel.com
</content>
</entry>
<entry>
<title>drm/xe/wa_oob: Consolidate some OOB rules</title>
<updated>2026-02-23T23:44:34Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2026-02-20T17:27:44Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=a2d0403de6492a32e5c175b22ebac053f579d350'/>
<id>urn:sha1:a2d0403de6492a32e5c175b22ebac053f579d350</id>
<content type='text'>
Given the new policy of allowing graphics/media IP ranges to extend over
unused IP versions, we can consolidate some of the OOB workaround rules
and simplify the table.  If new IP variants eventually show up that use
these unused versions (e.g., media version 30.01, graphics versions
20.03 / 30.02, etc.), and if an existing workaround does not extend to
that new intermediate version, the ranges will be split back apart as
part of the enablement work for that new IP version.

Reviewed-by: Shuicheng Lin &lt;shuicheng.lin@intel.com&gt;
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-22-b12005a05af6@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/pvc: Drop pre-prod workarounds</title>
<updated>2026-02-23T23:43:35Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2026-02-20T17:27:24Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=4405938293631604f0bec290c2e30bd392608393'/>
<id>urn:sha1:4405938293631604f0bec290c2e30bd392608393</id>
<content type='text'>
Production PVC hardware had a graphics stepping of C0.  Xe1 platforms
already aren't officially supported by the Xe driver, but pre-production
steppings are especially out of scope (and 'has_pre_prod_wa' is not set
in the device descriptor).  Drop the workarounds that aren't relevant to
production hardware.

v2:
 - Drop the stream-&gt;override_gucrc which is no longer set anywhere after
   the removal of Wa_1509372804.  (Bala)
 - Drop xe_guc_rc_set_mode / xe_guc_rc_unset_mode which are no longer
   used after the removal of Wa_1509372804.

Bspec: 44484
Cc: Balasubramani Vivekanandan &lt;balasubramani.vivekanandan@intel.com&gt;
Reviewed-by: Balasubramani Vivekanandan &lt;balasubramani.vivekanandan@intel.com&gt;
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-2-b12005a05af6@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/mtl: Drop pre-prod workarounds Wa_14015795083 &amp; Wa_14014475959</title>
<updated>2026-02-23T23:43:35Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2026-02-20T17:27:23Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=ad41e9418d97aa48a30517845a56ae8032c24a87'/>
<id>urn:sha1:ad41e9418d97aa48a30517845a56ae8032c24a87</id>
<content type='text'>
Wa_14015795083 and Wa_14014475959 only apply to early steppings of
Xe_LPG that appeared only in pre-production hardware (in fact
Wa_14014475959 wasn't supposed to apply to _any_ steppings of version
12.71).  Xe1 platforms already aren't officially supported by the Xe
driver, but pre-production steppings are especially out of scope (and
'has_pre_prod_wa' is not set in the device descriptor).  Drop both
workarounds.

Bspec: 55420
Reviewed-by: Balasubramani Vivekanandan &lt;balasubramani.vivekanandan@intel.com&gt;
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-1-b12005a05af6@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset</title>
<updated>2026-02-09T20:00:16Z</updated>
<author>
<name>Sk Anirban</name>
<email>sk.anirban@intel.com</email>
</author>
<published>2026-02-02T10:53:15Z</published>
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<id>urn:sha1:c57db41b8d2cd410e7219729f446aa17965485ad</id>
<content type='text'>
Prevent GuC firmware DMA failures during GuC-only reset by disabling
idle flow and verifying SRAM handling completion. Without this, reset
can be issued while SRAM handler is copying WOPCM to SRAM,
causing GuC HW to get stuck.

v2: Modify error message (Badal)
    Rename reg bit name (Daniele)
    Update WA skip condition (Daniele)
    Update SRAM handling logic (Daniele)
v3: Reorder WA call (Badal)
    Wait for GuC ready status (Daniele)
v4: Update reg name (Badal)
    Add comment (Daniele)
    Add extended graphics version (Daniele)
    Modify rules

Signed-off-by: Sk Anirban &lt;sk.anirban@intel.com&gt;
Reviewed-by: Badal Nilawar &lt;badal.nilawar@intel.com&gt;
Acked-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Reviewed-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Link: https://patch.msgid.link/20260202105313.3338094-4-sk.anirban@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/lnl: Drop pre-production workaround support</title>
<updated>2025-12-13T05:17:10Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2025-12-12T18:14:13Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=83f4151787c5dd2f38a426cb01423149baa3bbf5'/>
<id>urn:sha1:83f4151787c5dd2f38a426cb01423149baa3bbf5</id>
<content type='text'>
LNL has been out long enough that all of our internal usage of
pre-production hardware has been phased out and we no longer need to
maintain workarounds that were exclusive to pre-production parts.

Production LNL hardware always has B0 or later steppings for both
graphics and media IP.  Eliminate all workarounds that were exclusive to
A-step hardware and set the 'has_prod_wa_only' device flag for LNL to
make sure we warn and taint if someone tries to load the driver on an
old pre-production part.

Bspec: 70821
Reviewed-by: Dnyaneshwar Bhadane &lt;dnyaneshwar.bhadane@intel.com&gt;
Link: https://patch.msgid.link/20251212181411.294854-4-matthew.d.roper@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Apply Wa_14020316580 in xe_gt_idle_enable_pg()</title>
<updated>2025-12-01T17:36:00Z</updated>
<author>
<name>Vinay Belgaumkar</name>
<email>vinay.belgaumkar@intel.com</email>
</author>
<published>2025-11-29T05:25:48Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=8b5502145351bde87f522df082b9e41356898ba3'/>
<id>urn:sha1:8b5502145351bde87f522df082b9e41356898ba3</id>
<content type='text'>
Wa_14020316580 was getting clobbered by power gating init code
later in the driver load sequence. Move the Wa so that
it applies correctly.

Fixes: 7cd05ef89c9d ("drm/xe/xe2hpm: Add initial set of workarounds")
Suggested-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Signed-off-by: Vinay Belgaumkar &lt;vinay.belgaumkar@intel.com&gt;
Reviewed-by: Riana Tauro &lt;riana.tauro@intel.com&gt;
Reviewed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://patch.msgid.link/20251129052548.70766-1-vinay.belgaumkar@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/xe3: Add support for graphics IP versions 30.04 &amp; 30.05</title>
<updated>2025-10-17T22:32:37Z</updated>
<author>
<name>Shekhar Chauhan</name>
<email>shekhar.chauhan@intel.com</email>
</author>
<published>2025-10-17T02:26:20Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=4fde66699f1ced2eeb6e58ff0eaf46e4fc92a7a0'/>
<id>urn:sha1:4fde66699f1ced2eeb6e58ff0eaf46e4fc92a7a0</id>
<content type='text'>
Add graphics IP versions 30.04 &amp; 30.05 and initial workarounds for these
IP versions.

BSpec: 74201
Signed-off-by: Shekhar Chauhan &lt;shekhar.chauhan@intel.com&gt;
Reviewed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
Link: https://lore.kernel.org/r/20251016-xe3p-v3-1-3dd173a3097a@intel.com
Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Correct lineage for Wa_22014953428 and only check with valid GT</title>
<updated>2025-10-14T14:45:17Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2025-10-13T20:10:01Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=6a913fc86a847f011b22f5d8f8816aabaa48437c'/>
<id>urn:sha1:6a913fc86a847f011b22f5d8f8816aabaa48437c</id>
<content type='text'>
Wa_22014953428 was incorrectly labelled with a release-specific ID
number rather than the cross-platform lineage number; fix that.
Also check that the GT is not NULL before trying to lookup the
workaround in it.  Since this workaround only applies to DG2 discrete
GPUs (where the primary GT cannot be disabled), no coverage is lost.

Reviewed-by: Gustavo Sousa &lt;gustavo.sousa@intel.com&gt;
Link: https://lore.kernel.org/r/20251013200944.2499947-43-matthew.d.roper@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Handle Wa_22010954014 and Wa_14022085890 as device workarounds</title>
<updated>2025-10-14T14:45:17Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2025-10-13T20:09:58Z</published>
<link rel='alternate' type='text/html' href='https://git.ilvokhin.com/linux.git/commit/?id=78de8f87668334a3bfadad52e5142fc19dad1807'/>
<id>urn:sha1:78de8f87668334a3bfadad52e5142fc19dad1807</id>
<content type='text'>
When Wa_22010954014 and Wa_14022085890 were first implemented, we didn't
have a device workaround infrastructure so we hacked them into the GT
workaround list.  Now that we have proper device workaround support,
move them to the proper place.  Note that Wa_14022085890 specifically
applies to BMG-G21 platforms, so this requires defining a BMG
subplatform to capture the correct subset of device IDs.

Reviewed-by: Gustavo Sousa &lt;gustavo.sousa@intel.com&gt;
Link: https://lore.kernel.org/r/20251013200944.2499947-40-matthew.d.roper@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
</feed>
